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Ananda Y R

Assistant Professor

ananda.yr@iiitb.ac.in

Education : Ph.D. (IIT Guwahati)

Ananda Y. R. completed his Ph.D. in 2023 from the Department of Electronics and Electrical Engineering, IIT Guwahati, Assam, India. He obtained a B.E. degree in Electronics and Communication Engineering and an M.Tech. degree in VLSI Design and Embedded Systems from Visvesvaraya Technological University, Belgaum, Karnataka, India, in 2011 and 2014, respectively. Before starting his Ph.D., he worked as an assistant professor at the Department of Electronics and Communication Engineering, Dayananda Sagar College of Engineering (DSCE), Bangalore from 2014 to 2017. Additionally, he served as a Junior Research Fellow (JRF) in a DST-SERB sponsored project titled "Performance and energy optimization in many-core processors using dynamic cooperation cache memory, NoC, and DRAM controller" at the Department of Computer Science and Engineering, IIT Guwahati, from 2017 to 2018. His research interests include Memelements, Analog VLSI Design, and Semiconductor Devices.

 

Memcomputing Devices (Memelements), Analog and Mixed Signal Integrated Circuit Design, Semiconductor devices, Digital circuit design and FPGA implementation, and VLSI architectures.

 

Journals:

  1. Ananda Y R, G. S. Satyanarayan, and Gaurav Trivedi, “A Flux Controlled MOS-Based Optimized High-Frequency Meminductor Emulator,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, no. 4, pp. 774-784, Dec. 2022. ISSN: 2156-3365 (DOI: 10.1109/JETCAS.2022.3221305) 
  2. Ananda Y R, N. Raj, and Gaurav Trivedi, “A MOS-DTMOS Implementation of Floating Memristor Emulator for High-Frequency Applications,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 3, pp. 355-368, March 2023. ISSN: 1557-9999 (DOI: 10.1109/TVLSI.2022.3227201) 
  3. Ananda Y R, G. S. Satyanarayan, and Gaurav Trivedi, “An Optimized MOS-Based High-Frequency Charge-Controlled Memcapacitor Emulator,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, no. 4, pp. 793–803, Dec. 2022. ISSN: 2156-3365 (DOI: 10.1109/JETCAS.2022.3221314) 
  4. Ananda Y R, G. S. Satyanarayan, and Gaurav Trivedi, “A High Frequency MOS-based Floating Charge-Controlled Memcapacitor Emulator,” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 70, no. 3, pp. 1189-1193, March 2023. ISSN: 1558-3791 (DOI: 10.1109/TCSII.2022.3221334) 

Conferences:

  1. Ananda Y R, A. Hajra and Gaurav Trivedi, “An Adaptive Window Function based Memristor Model,” 33rd International Conference Radioelektronika (RADIOELEKTRONIKA), Pardubice, Czech Republic, 2023, pp. 1-5. ISBN:979-8-3503-9834-2 (DOI: 10.1109/RADIOELEKTRONIKA57919.2023.10109029)
  2. Ananda Y R, Subhashis Das, and Gaurav Trivedi, “A Novel Dynamic Memristor Window Function for High-Frequency Applications,” 21st IEEE Interregional NEWCAS Conference -An IEEE CAS Society Interregional Flagship Conference, Edinburgh, United Kingdom, 2023. ISSN: 2474-9672 (DOI: 10.1109/NEWCAS57931.2023.10198059

"Best Thesis Award" Issued by the Department of Electronics and Electrical Engineering, Indian Institute of Technology Guwahati for my Doctoral Dissertation Work Titled "Design and Analysis of Memelements for Low Power and Area Efficient High-Frequency Applications" at the 26th Convocation of IIT Guwahati on 14th July 2024.