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Assistant Professor
rituparna.choudhury@iiitb.ac.in
Education : Ph.D. (IIT Guwahati)
Rituparna Choudhury completed her Ph.D. in 2023 from the Department of Electronics and Electrical Engineering, IIT Guwahati, Assam, India. She obtained her B.Tech. degree in Electronics and Telecommunication Engineering from Kalinga Institute of Industrial Technology, Bhubnaeswar in 2015. She received her M.Tech. degree in ECE (VLSI) from National Institute of Technology Meghalaya, Shillong, Meghalaya, India in 2017. She served as Assistant Professor in the Department of Electronics and Communication at SRM University-AP, Mangalagiri, Andhra Pradesh from September, 2023 to November, 2024. Her research interest includes machine learning/deep learning algorithms, digital circuit design on FPGA/ASIC
VLSI Design, FPGA, ASIC, Hardware Accelerators for ML/DL, Digital Circuits implementation
- R. Choudhury, S. R. Ahamed and P. Guha, "Training Accelerator for Two Means Decision Tree," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 7, pp. 1465-1469, July 2021, doi: 10.1109/TVLSI.2021.3076081
- R. Choudhury, S. R. Ahamed and P. Guha, "FPGA Implementation of Batch-Mode Depth-Pipelined Two Means Decision Tree," in IEEE Embedded Systems Letters, vol. 15, no. 1, pp. 17-20, March 2023, doi: 10.1109/LES.2022.3190001.
- R. Choudhury, S. R. Ahamed and P. Guha, "Simplified Oblique Decision Tree Accelerator," in IEEE Embedded Systems Letters, doi: 10.1109/LES.2024.3475397
- R. Choudhury, S. R. Ahamed and P. Guha, "FPGA Implementation of Low Complexity Hybrid Decision Tree Training Accelerator," 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 511-514, doi: 10.1109/MWSCAS47672.2021.9531848.
- R. Choudhury, S. R. Ahamed and P. Guha, "Hardware Implementation of Low Complexity High-speed Perceptron Block," 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 26-30, doi: 10.1109/ISCAS48785.2022.9937758.